esp-idf: Kernel panic on i2c_new_master_bus (IDFGH-11838)

Answers checklist.

  • I have read the documentation ESP-IDF Programming Guide and the issue is not addressed there.
  • I have updated my IDF branch (master or release) to the latest version and checked that the issue is present there.
  • I have searched the issue tracker for a similar issue and not found a similar issue.

IDF version.

v5.3-dev-1196-gece73357ca

Espressif SoC revision.

ESP32-D0WD-V3 (revision v3.1)

Operating System used.

Linux

How did you build your project?

VS Code IDE

If you are using Windows, please specify command line type.

None

Development Kit.

custom kit

Power Supply used.

USB

What is the expected behavior?

I2C master bus is installed created when running i2c_new_master_bus().

What is the actual behavior?

I am getting a Guru Meditation Error: Core 0 panic'ed (Interrupt wdt timeout on CPU0). error when attempting to run i2c_new_master_bus().

This function was working perfectly for a while, but suddenly crashed after I recompiled the code for a different change.

Steps to reproduce.

This seems to be triggered purely by a call to i2c_new_master_bus(). No other code is running at the time as I am unit testing.

static void display_bus_initialise(unsigned char SDA, unsigned char SCL) {
  if (display_bus_initialised) return;
  // Configuration
  i2c_master_bus_config_t display_bus_config = {
      .i2c_port = -1,  // -1 means auto selecting
      .sda_io_num = static_cast<gpio_num_t>(SDA),
      .scl_io_num = static_cast<gpio_num_t>(SCL),
      .clk_source = I2C_CLK_SRC_DEFAULT,  // Default clock source
      .glitch_ignore_cnt = 7,             // Filtering glitches
      .intr_priority = 0,                 // 0 = default
      .trans_queue_depth = 2,  // Maximum number of asynchronous transactions
      .flags = 1,
  };
  ESP_ERROR_CHECK(i2c_new_master_bus(&display_bus_config, &display_bus_handle));
  display_bus_initialised = true;
  ESP_LOGI(TAG("display_bus_initialise()"),
           "Bus handle: %p | SDA: %i | SCL: %i",
           display_bus_handle,
           SDA,
           SCL);
};

Called from the following function (which never actually gets called).

static void *add_display_device(unsigned char addr,
                                unsigned char SDA,
                                unsigned char SCL) {
  display_bus_initialise(SDA, SCL);
  i2c_device_config_t sh1106_config = {
      .dev_addr_length = I2C_ADDR_BIT_LEN_7,  // 7 bit address
      .device_address = addr,                 // 0x3C
      .scl_speed_hz = 400000                  // 400MHZ
  };
  i2c_master_dev_handle_t device_handle;
  ESP_ERROR_CHECK(i2c_master_bus_add_device(display_bus_handle,
                                            &sh1106_config,
                                            &device_handle));
  ESP_LOGI(TAG("add_display_device()"),
           "Bus handle: %p | Device handle: %p | Addr: %i | SDA: %i | SCL: %i",
           display_bus_handle,
           device_handle,
           addr,
           SDA,
           SCL);
  return static_cast<void *>(device_handle);
};

Debug Logs.

D (521) i2c.common: new bus(0) at 0x3ffb60c0
I (521) gpio: GPIO[23]| InputEn: 1| OutputEn: 1| OpenDrain: 1| Pullup: 1| Pulldown: 0| Intr:0 
I (531) gpio: GPIO[22]| InputEn: 1| OutputEn: 1| OpenDrain: 1| Pullup: 1| Pulldown: 0| Intr:0 
D (541) i2c.common: bus clock source frequency: 80000000hz
V (551) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (551) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0x50E
D (561) intr_alloc: Connected src 49 to int 12 (cpu 0)
Guru Meditation Error: Core  0 panic'ed (Interrupt wdt timeout on CPU0). 

Core  0 register dump:
PC      : 0x40083281  PS      : 0x00050034  A0      : 0x400eaaed  A1      : 0x3ffb1030  
0x40083281: _xt_lowint1 at [redacted]/esp32/esp-idf/components/xtensa/xtensa_vectors.S:1240

0x400eaaed: i2c_new_master_bus at esp32/esp-idf/components/esp_driver_i2c/i2c_master.c:858

A2      : 0x00000000  A3      : 0x3ffb0370  A4      : 0x40082298  A5      : 0x3ffb1010  
0x40082298: shared_intr_isr at [redacted]/esp32/esp-idf/components/esp_hw_support/intr_alloc.c:435

A6      : 0x3ffb6370  A7      : 0x3ffb4ae0  A8      : 0x000005a8  A9      : 0x400871da  
0x400871da: _frxt_int_enter at [redacted]/esp32/esp-idf/components/freertos/FreeRTOS-Kernel/portable/xtensa/portasm.S:140

A10     : 0x000005a8  A11     : 0x00000000  A12     : 0x00000000  A13     : 0x3ffb0ff0  
A14     : 0x3ffb0058  A15     : 0xffffffff  SAR     : 0x00000004  EXCCAUSE: 0x00000005  
EXCVADDR: 0x00000000  LBEG    : 0x4000c46c  LEND    : 0x4000c477  LCOUNT  : 0x00000000  
0x4000c46c: memset in ROM

0x4000c477: memset in ROM

Core  0 was running in ISR context:
EPC1    : 0x400d27bf  EPC2    : 0x00000000  EPC3    : 0x00000000  EPC4    : 0x40083281
0x400d27bf: uart_hal_write_txfifo at [redacted]/esp32/esp-idf/components/hal/uart_hal_iram.c:27

0x40083281: _xt_lowint1 at [redacted]/esp32/esp-idf/components/xtensa/xtensa_vectors.S:1240



Backtrace: 0x4008327e:0x3ffb1030 0x400eaaea:0x3ffb4a80 0x400d6598:0x3ffb4ad0 0x400d65e3:0x3ffb4b20 0x400d665c:0x3ffb4b60 0x400d6522:0x3ffb4b90 0x400eb79c:0x3ffb4fc0 0x40086db1:0x3ffb4ff0
0x4008327e: _xt_lowint1 at[ redacted]/esp32/esp-idf/components/xtensa/xtensa_vectors.S:1240

0x400eaaea: i2c_ll_enable_intr_mask at [redacted]/esp32/esp-idf/components/hal/esp32/include/hal/i2c_ll.h:204
 (inlined by) i2c_new_master_bus at [redacted]/esp32/esp-idf/components/esp_driver_i2c/i2c_master.c:857

0x400d6598: display_bus_initialise(unsigned char, unsigned char) at [redacted]/hardware/sh1106/sh1106.cpp:43

0x400d65e3: add_display_device(unsigned char, unsigned char, unsigned char) at [redacted]/hardware/sh1106/sh1106.cpp:57

0x400d665c: Hardware::SH1106::SH1106(unsigned char, unsigned char, unsigned char) at [redacted]/hardware/sh1106/sh1106.cpp:85

0x400d6522: app_main at [redacted]/main/main.cpp:37

0x400eb79c: main_task at [redacted]/esp32/esp-idf/components/freertos/app_startup.c:208

0x40086db1: vPortTaskWrapper at [redacted]/esp32/esp-idf/components/freertos/FreeRTOS-Kernel/portable/xtensa/port.c:134



Core  1 register dump:
PC      : 0x400851e6  PS      : 0x00060734  A0      : 0x800d2656  A1      : 0x3ffb5ba0  
0x400851e6: esp_cpu_wait_for_intr at [redacted]/esp32/esp-idf/components/esp_hw_support/cpu.c:145

A2      : 0x00000000  A3      : 0x00000000  A4      : 0x3ffaf8d0  A5      : 0x3ffaf8b0  
A6      : 0x40081c58  A7      : 0x00000001  A8      : 0x800d87ce  A9      : 0x3ffb5b60  
0x40081c58: ipc_task at [redacted]/esp32/esp-idf/components/esp_system/esp_ipc.c:48

A10     : 0x00000000  A11     : 0x00000000  A12     : 0x3ffaf8b0  A13     : 0x3ffaf880  
A14     : 0x00000001  A15     : 0x3ffb5c88  SAR     : 0x00000000  EXCCAUSE: 0x00000005  
EXCVADDR: 0x00000000  LBEG    : 0x00000000  LEND    : 0x00000000  LCOUNT  : 0x00000000  


Backtrace: 0x400851e3:0x3ffb5ba0 0x400d2653:0x3ffb5bc0 0x40087ba6:0x3ffb5be0 0x40086db1:0x3ffb5c00
0x400851e3: xt_utils_wait_for_intr at [redacted]/esp32/esp-idf/components/xtensa/include/xt_utils.h:81
 (inlined by) esp_cpu_wait_for_intr at [redacted]/esp32/esp-idf/components/esp_hw_support/cpu.c:132

0x400d2653: esp_vApplicationIdleHook at [redacted]/esp32/esp-idf/components/esp_system/freertos_hooks.c:59

0x40087ba6: prvIdleTask at [redacted]/esp32/esp-idf/components/freertos/FreeRTOS-Kernel/tasks.c:4273 (discriminator 1)

0x40086db1: vPortTaskWrapper at [redacted]/esp32/esp-idf/components/freertos/FreeRTOS-Kernel/portable/xtensa/port.c:134

More Information.

No response

About this issue

  • Original URL
  • State: closed
  • Created 6 months ago
  • Reactions: 1
  • Comments: 30

Commits related to this issue

Most upvoted comments

@ceribus So i2c_set_timeout in old driver can solve your problem right? If so, I will add an option in new driver. Thanks for giving such clue!

@mbratch @babagreensheep Thanks guys. I found a very different behavior of timeout fsm on ESP32 compared with other esp chips. So I find the thing is when we call i2c_ll_enable_intr_mask this in initialization state, and the interrupt works, but at this moment, no I2C transaction starts. So the interrupt always reports timeout error without any following handle. So you can see guru meditation here.

I’m trying to delete i2c_ll_enable_intr_mask in initialize in initialize state, and seems it works better. So, can you do me a favor, delete i2c_ll_enable_intr_mask in i2c_new_master_bus and see the result. I would be appreciate if I get any response.

The changes can be:

ret = esp_intr_alloc_intrstatus(i2c_periph_signal[i2c_port_num].irq, isr_flags, (uint32_t)i2c_ll_get_interrupt_status_reg(hal->dev), I2C_LL_MASTER_EVENT_INTR, i2c_master_isr_handler_default, i2c_master, &i2c_master->base->intr_handle);
ESP_GOTO_ON_ERROR(ret, err, TAG, "install i2c master interrupt failed");
atomic_init(&i2c_master->status, I2C_STATUS_IDLE);

// **i2c_ll_enable_intr_mask(hal->dev, I2C_LL_MASTER_EVENT_INTR); This line!!!**
i2c_ll_master_set_filter(hal->dev, bus_config->glitch_ignore_cnt);

xSemaphoreGive(i2c_master->cmd_semphr);

@ceribus Thanks, ESP32 is always the special, let me test.