zephyr: SMP not working on ESP32
Describe the bug A simple Symmetric Multiprocessing example is not working on ESP32 even though SMP seems supported
To Reproduce
Simple snippet to reproduce the issue:
main.c
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#define THREADS_NUM 2
#define STACK_SIZE 1024
static K_THREAD_STACK_ARRAY_DEFINE(tstack, THREADS_NUM, STACK_SIZE);
static struct k_thread tthread[THREADS_NUM];
static int curr_cpu(void)
{
unsigned int k = arch_irq_lock();
int ret = arch_curr_cpu()->id;
arch_irq_unlock(k);
return ret;
}
void test_thread(void *arg1, void *arg2, void *arg3)
{
const uint32_t counter = *(uint32_t*)arg1;
printk("Staring thread number %d\n", counter);
while(1)
{
uint32_t proc_id = curr_cpu();
printk("Thread number %d running on cpu %d\n", counter, proc_id);
k_sleep(K_SECONDS(1));
}
}
int main() {
uint32_t proc_id = curr_cpu();
printk("Main running on cpu %d\n", proc_id);
for (uint32_t i = 0; i < THREADS_NUM; i++) {
k_thread_create(&tthread[i], tstack[i], STACK_SIZE,
(k_thread_entry_t)test_thread,
(void *)&i, NULL, NULL,
K_PRIO_COOP(11) , 0, K_NO_WAIT);
}
while(1)
{
k_yield();
}
return 0;
}
prj.conf
CONFIG_SMP=y
CONFIG_MP_MAX_NUM_CPUS=2
Expected behavior One of the possible output on UART console:
Main running on cpu 0
Staring thread number 0
Thread number 0 running on cpu 1
Staring thread number 1
Thread number 1 running on cpu 0
Thread number 0 running on cpu 1
Thread number 1 running on cpu 0
Impact SMP not working
Logs and console output No output in UART. However if I disable SMP, I get the following output as expected:
Main running on cpu 0
Staring thread number 0
Thread number 0 running on cpu 0
Staring thread number 1
Thread number 1 running on cpu 0
Thread number 0 running on cpu 0
Thread number 1 running on cpu 0
Environment (please complete the following information):
- OS: Linux
- Toolchain Zephyr
- Commit SHA or Version used: latest main branch d4ed0d7a2d
About this issue
- Original URL
- State: closed
- Created a year ago
- Comments: 29 (7 by maintainers)
I tested on an revision 3 device, doesn’t work.
@cfriedt, indeed the SMP isn’t working as reported. ESP32-C3 is single core, so no SMP. However, ESP32 should be working and it is not. So I am reopening this.
It’s Xtensa only. ESP32-P4 will be the first Risc-V multicore that is capable of SMP.
Maybe the documentation should be updated to say that SMP isn’t supported and is not planned?
We have started checking this. Already fixed the sample code to work but SMP is not working as it should yet.