zephyr: k_uptime_delta returns wrong times
I like to detect button events. They are selected after different holding times for a button.
A gpio interrupt is generated at every change of the button pin state. At the interrupt handler the time difference is measured between the current and the previous interrupt.
For that k_uptime_delta is used. I recognized that my measured times are at least by the factor 2 to low.
My setup is a own stm32F412 board with following config:
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000
CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
# clock configuration
CONFIG_CLOCK_CONTROL=y
# Clock configuration for Cube Clock control driver
CONFIG_CLOCK_STM32_HSE_CLOCK=24000000
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# use HSE as PLL input
CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
# the board have an external oscillator
CONFIG_CLOCK_STM32_HSE_BYPASS=n
# produce 96MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_M_DIVISOR=12
CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=96
CONFIG_CLOCK_STM32_PLL_P_DIVISOR=2
CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=4
CONFIG_CLOCK_STM32_AHB_PRESCALER=2
CONFIG_CLOCK_STM32_APB1_PRESCALER=4
CONFIG_CLOCK_STM32_APB2_PRESCALER=4
Maybe I setup the config wrongly or the k_uptime_delta function is buggy. Any ideas?
About this issue
- Original URL
- State: closed
- Created 5 years ago
- Comments: 33 (16 by maintainers)
Commits related to this issue
- stm32: clock_control: Enforce HCLK prescaler value STM32 clock control subsystem allows to configure a different frequency value for core clock (SYSCLK) and AHB clock (HCLK). Though, it is HCLK which... — committed to erwango/zephyr by erwango 5 years ago
- stm32: clock_control: Enforce HCLK prescaler value STM32 clock control subsystem allows to configure a different frequency value for core clock (SYSCLK) and AHB clock (HCLK). Though, it is HCLK which... — committed to zephyrproject-rtos/zephyr by erwango 5 years ago
- stm32: clock_control: Enforce HCLK prescaler value STM32 clock control subsystem allows to configure a different frequency value for core clock (SYSCLK) and AHB clock (HCLK). Though, it is HCLK which... — committed to LeiW000/zephyr by erwango 5 years ago
@StefJar , please do, current issue will be closed by #17938. Please provide the SHA1 in use in the new issue you’ll create
@StefJar , hold on closing this PR. I’ll send a patch to prevent use of AHB prescaler different from ‘1’. This will close current issue. Please open a new one for the issue you’re currently seeing with AHB set to ‘1’.