qiskit: Circuit incorrectly justifed

It seems like this example has the same issue (last round of H):

@1ucian0 , I recreate qasm for the circuit you illustrated above and test draw left, right, and none with this code:

qasm = """
OPENQASM 2.0;
include "qelib1.inc";
qreg q[4];
h q[0];
h q[1];
h q[2];
h q[3];
cx q[0],q[3];
h q[1];
cx q[0],q[2];
cx q[0],q[1];
h q[2];
cx q[0],q[1];
h q[2];
cx q[0],q[2];
h q[1];
cx q[0],q[3];
h q[0];
h q[1];
h q[2];
h q[3];
 """
from qiskit import QuantumCircuit
qc = QuantumCircuit.from_qasm_str(qasm)
print("draw left")
print(qc.draw(justify='left'))
print("draw right")
print(qc.draw(justify='right'))
print("draw none")
print(qc.draw(justify='none'))

The resulting output is show below. Am I correct that both left and right are incorrect (left for the reason you pointed out above, and right for the positioning of the last h q[3]) while none is correct?

draw left
        ┌───┐                                             ┌───┐
q_0: |0>┤ H ├──■─────────■────■────■────■─────────■───────┤ H ├
        ├───┤  │  ┌───┐  │  ┌─┴─┐┌─┴─┐  │  ┌───┐  │  ┌───┐└───┘
q_1: |0>┤ H ├──┼──┤ H ├──┼──┤ X ├┤ X ├──┼──┤ H ├──┼──┤ H ├─────
        ├───┤  │  └───┘┌─┴─┐├───┤├───┤┌─┴─┐└───┘  │  ├───┤     
q_2: |0>┤ H ├──┼───────┤ X ├┤ H ├┤ H ├┤ X ├───────┼──┤ H ├─────
        ├───┤┌─┴─┐     └───┘└───┘└───┘└───┘     ┌─┴─┐└───┘┌───┐
q_3: |0>┤ H ├┤ X ├──────────────────────────────┤ X ├─────┤ H ├
        └───┘└───┘                              └───┘     └───┘
draw right
        ┌───┐                                        ┌───┐
q_0: |0>┤ H ├──■─────────■────■────■────■─────────■──┤ H ├
        ├───┤  │  ┌───┐  │  ┌─┴─┐┌─┴─┐  │  ┌───┐  │  ├───┤
q_1: |0>┤ H ├──┼──┤ H ├──┼──┤ X ├┤ X ├──┼──┤ H ├──┼──┤ H ├
        ├───┤  │  └───┘┌─┴─┐├───┤├───┤┌─┴─┐├───┤  │  └───┘
q_2: |0>┤ H ├──┼───────┤ X ├┤ H ├┤ H ├┤ X ├┤ H ├──┼───────
        ├───┤┌─┴─┐     └───┘└───┘└───┘└───┘└───┘┌─┴─┐┌───┐
q_3: |0>┤ H ├┤ X ├──────────────────────────────┤ X ├┤ H ├
        └───┘└───┘                              └───┘└───┘
draw none
        ┌───┐                                                                      ┌───┐          
q_0: |0>┤ H ├──────────────────────■────■────■────■────────────────────────■────■──┤ H ├──────────
        └───┘┌───┐┌───┐            │    │  ┌─┴─┐┌─┴─┐┌───┐┌───┐            │    │  └───┘          
q_1: |0>─────┤ H ├┤ H ├────────────┼────┼──┤ X ├┤ X ├┤ H ├┤ H ├────────────┼────┼─────────────────
             └───┘└───┘┌───┐       │  ┌─┴─┐└───┘└───┘└───┘└───┘┌───┐┌───┐┌─┴─┐  │       ┌───┐     
q_2: |0>───────────────┤ H ├───────┼──┤ X ├────────────────────┤ H ├┤ H ├┤ X ├──┼───────┤ H ├─────
                       └───┘┌───┐┌─┴─┐└───┘                    └───┘└───┘└───┘┌─┴─┐     └───┘┌───┐
q_3: |0>────────────────────┤ H ├┤ X ├────────────────────────────────────────┤ X ├──────────┤ H ├

I think the error is likely to be in qiskit-terra/qiskit/visualization/utils.py in the method _get_layered_instructions() as I am seeing the bug in both the mpl and the latex outputs too. It is probably an error with the way the layers are being generated rather than drawn.

If you have a look at the DAG generated by the qasm you have given, it can be seen that the measure is independent of the cx and final h so it does not matter where in the list comes in relation to them. According to the networkx documentation topological sorts are non unique, which means that both the qasm order and the order returned by the DAG are valid (along with many other potential orderings!). We have found that the order the nodes are returned can vary with python versions, but ultimately they are all valid orderings.

For justification right, the H on q_2 should be on the last time slice, not the first.

Yes 😃

Okay, I think I was confused by the measure but since q[1] isn’t being measured it doesn’t matter where the second u2[q1] appears w/r/t the messure.

@jwoehr the justifications are to enable you too see the ASAP/ALAP layouts of the circuit. left means all the gates are drawn in the circuit as far to the left as possible, so the ASAP ordering. right means they are drawn as far to the right, ALAP ordering. none means each gate appears in its own column in the circuit.

The expected behaviour in the top example is that the two u2 gates are stacked on top of eachother, as regardless of the order they were declared in they can happen at the same time.

It seems like this example has the same issue (last round of H):