esp-idf: Wrong reset cause on brownout (ESP_RST_WDT instead of ESP_RST_BROWNOUT) (IDFGH-9468)

Answers checklist.

I have read the documentation ESP-IDF Programming Guide and the issue is not addressed there.
I have updated my IDF branch (master or release) to the latest version and checked that the issue is present there.
I have searched the issue tracker for a similar issue and not found a similar issue.

IDF version.

4.4.4

Operating System used.

Windows

How did you build your project?

VS Code IDE

If you are using Windows, please specify command line type.

None

Development Kit.

TTGO (ESP32)

Power Supply used.

USB

What is the expected behavior?

After a brownout and the subsequent restart, ESP_RST_BROWNOUT should be returned by esp_reset_reason().

What is the actual behavior?

Instead, esp_reset_reason() returns ESP_RST_WDT.

Steps to reproduce.

Run any code that displays the result of esp_reset_reason(), then provoke a supply voltage instability. The console will correctly show “Brownout detector was triggered”, the ESP32 will restart and esp_reset_reason() will show the wrong reason.

Debug Logs.

No response

More Information.

The IDF sets the reset reason correctly: https://github.com/espressif/esp-idf/blob/release/v4.4/components/esp_system/port/brownout.c#L66 But it seems to get overwritten by the way the CPUs are reset (using the watchdog).

About this issue

Original URL
State: open
Created a year ago
Comments: 29 (2 by maintainers)

Most upvoted comments

I have reproduced it powering esp with a regulated dc power supply and dropping it’s voltage to something around 1.3V. Using ESP_IDF v4.4.4.

rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:1
load:0x3fff0030,len:7008
load:0x40078000,len:15684
ho 0 tail 12 room 4
load:0x40080400,len:4516
0x40080400: _init at ??:?

entry 0x400806b8
I (57) boot: ESP-IDF v4.4.4 2nd stage bootloader
I (58) boot: compile time 14:54:10
I (58) boot: chip revision: v3.0
I (61) boot_comm: chip revision: 3, min. bootloader chip revision: 1
I (68) qio_mode: Enabling default flash chip QIO
I (74) boot.esp32: SPI Speed      : 80MHz
I (78) boot.esp32: SPI Mode       : QIO
I (83) boot.esp32: SPI Flash Size : 4MB
W (87) boot.esp32: PRO CPU has been reset by WDT.
W (93) boot.esp32: WDT reset info: PRO CPU PC=0x4000fdd0
W (99) boot.esp32: WDT reset info: APP CPU PC=0x401b3a16 (waiti mode)
0x401b3a16: esp_efuse_utility_check_errors at C:/esp/esp-idf/components/efuse/esp32/esp_efuse_utility.c:122

I (106) boot: Enabling RNG early entropy source...
I (111) boot: Partition Table:
I (115) boot: ## Label            Usage          Type ST Offset   Length
I (122) boot:  0 nvs              WiFi data        01 02 00009000 00005000
I (130) boot:  1 otadata          OTA data         01 00 0000e000 00002000
I (138) boot:  2 app0             OTA app          00 10 00010000 001b0000
I (145) boot:  3 app1             OTA app          00 11 001c0000 001b0000
I (153) boot:  4 spiffs           Unknown data     01 82 00370000 00060000
I (160) boot:  5 coredump         Unknown data     01 03 003d0000 00010000
I (168) boot:  6 reserved         Unknown data     01 fe���*�000 00020000
I (175) boot: End of partition table
I (180) boot_comm: chip revision: 3, min. application chip revision: 1
I (187) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=3ab60h (240480) map
I (262) esp_image: segment 1: paddr=0004ab88 vaddr=3ffb0000 size=05490h ( 21648) load
I (268) esp_image: segment 2: paddr=00050020 vaddr=400d0020 size=e8f10h (954128) map
I (532) esp_image: segment 3: paddr=00138f38 vaddr=3ffb5490 size=00578h (  1400) load
I (532) esp_image: segmen| 4: paddr=001394b8 vaddr=40080000 size=15c80h ( 89216) load
I (566) esp_image: segment 5: paddr=0014f140 vaddr=00000000 size=00e40h (  3648) 
I (579) boot: Loaded app from partition at offset 0x10000
I (579) boot: Disabling RNG early entropy source...
I (590) cpu_start: Pro cpu up.
I (590) cpu_start: Starting app cpu, entry point is 0x400811b4
0x400811b4: call_start_cpu1 at C:/esp/esp-idf/components/esp_system/port/cpu_start.c:148

VitorBFreitas on May 22, 2023

The RTC WDT cannot be disabled in general. It’s always activated by the ESP32 and the ROM bootloader timeout cannot be changed.

19.3.1.3 Flash Boot Protection

https://www.espressif.com/sites/default/files/documentation/esp32_technical_reference_manual_en.pdf

My workaround is to store the reset hint (RTC_RESET_CAUSE_REG) in RTC SRAM. This memory is not cleared by RTC WDT reset.

esp-idf already uses the RTC SRAM to store timekeeping info.

szmodz on Jun 11, 2023

@ginkgm Are all necessary information in this log? (ESP32-WROOM-32E)

ets Jul 29 2019 12:21:46

rst:0xf (RTCWDT_BROWN_OUT_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:1
load:0x3fff0030,len:7008
load:0x40078000,len:15684
ho 0 tail 12 room 4
load:0x40080400,len:4516
0x40080400: _init at ??:?

entry 0x400806b8
I (30) boot: ESP-IDF v4.4.4 2nd stage bootloader
I (30) boot: compile time 08:36:31
I (30) boot: chip revision: v3.0
I (33) boot_comm: chip revision: 3, min. bootloader chip revision: 1
I (40) qio_mode: Enabling default flash chip QIO
I (45) boot.esp32: SPI Speed      : 80MHz
I (50) boot.esp32: SPI Mode       : QIO
I (54) boot.esp32: SPI Flash Size : 4MB
I (59) boot: Enabling RNG early entropy source...
I (64) boot: Partition Table:
I (68) boot: ## Label            Usage          Type ST Offset   Length
I (75) boot:  0 nvs              WiFi data        01 02 00009000 00005000
I (83) boot:  1 otadata          OTA data         01 00 0000e000 00002000
I (90) boot:  2 app0             OTA app          00 10 00010000 001b0000
I (98) boot:  3 app1             OTA app          00 11 001c0000 001b0000
I (105) boot:  4 spiffs           Unknown data     01 82 00370000 00060000
I (113) boot:  5 coredump         Unknown data     01 03 003d0000 00010000
I (120) boot:  6 reserved         Unknown data     01 fe 003e0000 00020000
I (128) boot: End of partition table
I (132) boot_comm: chip revision: 3, min. application chip revision: 1
I (139) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=3b1d0h (242128) map
��וBets Jul 29 2019 12:21:46

rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:1
load:0x3fff0030,len:7008
load:0x40078000,len:15684
ho 0 tail 12 room 4
load:0x40080400,len:4516
0x40080400: _init at ??:?

entry 0x400806b8
I (29) boot: ESP-IDF v4.4.4 2nd stage bootloader
I (29) boot: compile time 08:36:31
I (30) boot: chip revision: v3.0
I (33) boot_comm: chip revision: 3, min. bootloader chip revision: 1
I (40) qio_mode: Enabling default flash chip QIO
I (45) boot.esp32: SPI Speed      : 80MHz
I (50) boot.esp32: SPI Mode       : QIO
I (54) boot.esp32: SPI Flash Size : 4MB
I (59) boot: Enabling RNG early entropy source...
I (64) boot: Partition Table:
I (68) boot: ## Label            Usage          Type ST Offset   Length
I (75) boot:  0 nvs              WiFi data        01 02 00009000 00005000
I (82) boot:  1 otadata          OTA data         01 00 0000e000 00002000
I (90) boot:  2 app0             OTA app          00 10 00010000 001b0000
I (97) boot:  3 app1             OTA app          00 11 001c0000 001b0000
I (105) boot:  4 spiffs           Unknown data     01 82 00370000 00060000
I (112) boot:  5 coredump         Unknown data     01 03 003d0000 00010000
I (120) boot:  6 reserved         Unknown data     01 fe 003e0000 00020000
I (127) boot: End of partition table
I (132) boot_comm: chip revision: 3, min. application chip revision: 1
I (139) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=3b1d0h (242128) map
I (214) esp_image: segment 1: paddr=0004b1f8 vaddr=3ffb0000 size=04e20h ( 20000) load
I (221) esp_image: segment 2: paddr=00050020 vaddr=400d0020 size=e95ech (955884) map
I (484) esp_image: segment 3: paddr=00139614 vaddr=3ffb4e20 size=00be8h (  3048) load
I (485) esp_image: segment 4: paddr=0013a204 vaddr=40080000 size=15c80h ( 89216) load
I (519) esp_image: segment 5: paddr=0014fe8c vaddr=00000000 size=000f4h (   244) 
I (530) boot: Loaded app from partition at offset 0x10000
I (530) boot: Disabling RNG early entropy source...
I (542) cpu_start: Pro cpu up.
I (542) cpu_start: Starting app cpu, entry point is 0x400811b4
0x400811b4: call_start_cpu1 at C:/esp/esp-idf/components/esp_system/port/cpu_start.c:149

I (0) cpu_start: App cpu up.
I (556) cpu_start: Pro cpu start user code
I (556) cpu_start: cpu freq: 240000000
I (556) cpu_start: Application information:
I (561) cpu_start: Project name:     mesh-shopBA
I (566) cpu_start: App version:      1.3.3
I (571) cpu_start: Compile time:     Jun  5 2023 13:15:21
I (577) cpu_start: ELF file SHA256:  dbb12184e25346a3...
I (583) cpu_start: ESP-IDF:          v4.4.4
I (588) heap_init: Initializing. RAM available for dynamic allocation:
I (595) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (601) heap_init: At 3FFBAC48 len 000253B8 (148 KiB): DRAM
I (607) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (614) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (620) heap_init: At 40095C80 len 0000A380 (40 KiB): IRAM
I (627) spi_flash: detected chip: generic
I (631) spi_flash: flash io: qio
I (635) esp_core_dump_flash: Init core dump to flash
I (641) esp_core_dump_flash: Found partition 'coredump' @ 3d0000 65536 bytes
D (682) esp_core_dump_checksum: Total length of hashed data: 40000
I (682) esp_core_dump_flash: Core dump data checksum is correct
I (684) esp_core_dump_flash: Found core dump 40004 bytes in flash @ 0x3d0000
I (692) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.

VitorBFreitas on Jun 9, 2023