esp-idf: ULP-RISCV I2C does not work when reading/writing multiple bytes (IDFGH-11056)
Answers checklist.
- I have read the documentation ESP-IDF Programming Guide and the issue is not addressed there.
- I have updated my IDF branch (master or release) to the latest version and checked that the issue is present there.
- I have searched the issue tracker for a similar issue and not found a similar issue.
IDF version.
master 5.2.2
Operating System used.
Linux
How did you build your project?
Command line with idf.py
If you are using Windows, please specify command line type.
None
Development Kit.
ESP32S3-PICO-1
Power Supply used.
External 3.3V
What is the expected behavior?
I expected to be able to read multiple bytes with ulp_riscv_i2c_master_read_from_device
What is the actual behavior?
The first byte read (or write) works, but he second one fails with those errors,
Steps to reproduce.
ulp_riscv_i2c_master_set_slave_addr( handle.slave_address );
#if 0
for( int i = 0; i < data_len; i++ ){
ulp_riscv_i2c_master_set_slave_reg_addr( mem_address + i );
ulp_riscv_i2c_master_read_from_device( &data[i], 1 );
ESP_LOGI( TAG, "multi: 0x%x, reg: 0x%x, READ: 0x%x", handle.slave_address, mem_address + i, data[i] );
}
#else
// FAILS
ulp_riscv_i2c_master_set_slave_reg_addr( mem_address );
ulp_riscv_i2c_master_read_from_device( data, data_len );
ESP_LOGI( TAG, "multi: 0x%x, reg: 0x%x, READ: 0x%x", handle.slave_address, mem_address, data[0] );
#endif
Debug Logs.
No response
More Information.
No response
About this issue
- Original URL
- State: open
- Created 10 months ago
- Comments: 18
Thanks for the confirmation @Ethapus. I shall add the fix after a few more tests.
Okay, something must have been awry in my local files, “git reset --hard origin/master” solved the issue. Sorry for not checking that before.
Anyways, I successfully installed the patch and am happy to report that my esp32 s3 now flawlessly reads and writes multiple bytes using ulp_riscv_i2c_master_read_from_device respectively ulp_riscv_i2c_master_write_to_device. This works from both main core application as well as ulp application, even though the main core application still seems to reference components/ulp/ulp_riscv/ulp_core/ulp_riscv_i2c.c for some reason. But it works, and that is what matters.
I thank you very much for the quick response and for solving the issue!
Hi @sudeep-mohanty, thanks for confirming. With respect to FreeRTOS, I always run with 1kHz and tickless idle. Please note that the multiple read/write when running on the ULP is working fine. It is very difficult to use the I2C from both sides, the Xtensa and the RiscV. Both are independent and even with riscv_lock semaphores or riscv_halt/reset it happens when both processors start doing I2C at the same time, consider startup procedures e.g. That is when things get weird. I have moved all I2C code to the ULP, to make sure. The only thing I would want is the ulp_riscv_i2c_master_init() to be available on the ULP side and not on the main processor. Maybe it is not possible, but it would make things cleaner. Maybe.